oboy/src/cpu.ml

265 lines
7.3 KiB
OCaml
Raw Normal View History

open Printf
(** http://bgb.bircd.org/pandocs.htm#cpuregistersandflags
http://gameboy.mongenel.com/dmg/lesson1.html *)
2015-02-24 17:30:14 +01:00
type registers = {
mutable a : char; (* accumulator *)
mutable f : char; (* flags *)
mutable b : char;
mutable c : char;
mutable d : char;
mutable e : char;
mutable h : char;
mutable l : char;
mutable sp : int; (* stack pointer *)
mutable pc : int; (* program counter *)
2015-02-24 17:30:14 +01:00
}
2015-03-23 12:50:02 +01:00
type flags = {
mutable z : bool; (* zero *)
mutable n : bool; (* substraction *)
mutable h : bool; (* half-carry *)
mutable c : bool; (* carry *)
}
2015-02-24 17:30:14 +01:00
type t = {
reg : registers;
2015-03-23 12:50:02 +01:00
flag : flags;
mutable cycles : int;
2015-02-24 17:30:14 +01:00
}
let print_cpu_state cpu =
printf "Registers:\n";
printf " A: 0x%02X F: 0x%02X\n" (int_of_char cpu.reg.a) (int_of_char cpu.reg.f);
printf " B: 0x%02X C: 0x%02X\n" (int_of_char cpu.reg.b) (int_of_char cpu.reg.c);
printf " D: 0x%02X E: 0x%02X\n" (int_of_char cpu.reg.d) (int_of_char cpu.reg.e);
printf " H: 0x%02X L: 0x%02X\n" (int_of_char cpu.reg.h) (int_of_char cpu.reg.l);
printf " PC: 0x%04X\n" cpu.reg.pc;
printf " SP: 0x%04X\n" cpu.reg.sp;
printf "Flags:\n";
printf " Z: %b\n" cpu.flag.z;
printf " N: %b\n" cpu.flag.n;
printf " H: %b\n" cpu.flag.h;
printf " C: %b\n" cpu.flag.c
(** http://bgb.bircd.org/pandocs.htm#powerupsequence *)
let init_registers =
{
a = '\x00';
f = '\x00';
b = '\x00';
c = '\x00';
d = '\x00';
e = '\x00';
h = '\x00';
l = '\x00';
sp = 0xFFFE;
pc = 0x0100;
}
2015-03-23 12:50:02 +01:00
let init_flags =
{
z = false; n = false; h = false; c = false
}
let init_cpu =
2015-03-23 12:50:02 +01:00
{ reg = init_registers; flag = init_flags; cycles = 0 }
let update_flag_reg cpu =
let z = if cpu.flag.z then 0b10000000 else 0 in
let n = if cpu.flag.n then 0b01000000 else 0 in
let h = if cpu.flag.h then 0b00100000 else 0 in
let c = if cpu.flag.c then 0b00010000 else 0 in
cpu.reg.f <- char_of_int @@ z + n + h + c
let inc_pc cpu count =
cpu.reg.pc <- cpu.reg.pc + count
let inc_cycles cpu count =
cpu.cycles <- cpu.cycles + count
2015-02-28 00:25:10 +01:00
let merge_bytes low high =
(int_of_char high) * 256 + (int_of_char low)
let split_2B x =
let low = x mod 256 |> char_of_int in
let high = x / 256 |> char_of_int in
(high, low)
2015-03-22 16:57:03 +01:00
let read_2B m addr =
let low = Memory.get m addr in
let high = Memory.get m (addr + 1) in
2015-02-28 00:25:10 +01:00
merge_bytes low high
let inc_BC cpu =
let v = merge_bytes cpu.reg.c cpu.reg.b in
let low, high = split_2B (v + 1) in
cpu.reg.c <- low;
cpu.reg.b <- high
2015-03-23 12:50:02 +01:00
let cmp_A cpu n =
let diff = int_of_char (cpu.reg.a) - n in
cpu.flag.z <- diff = 0;
cpu.flag.n <- true;
cpu.flag.h <- diff > 0x0F || diff < 0;
cpu.flag.c <- diff > 0xFF || diff < 0;
update_flag_reg cpu
2015-03-25 16:19:54 +01:00
let read_pc_byte cpu mem =
let b = Memory.get mem cpu.reg.pc in
inc_pc cpu 1;
int_of_char b
2015-05-08 14:48:44 +02:00
2015-03-25 16:19:54 +01:00
let read_pc_2bytes cpu mem =
let word = read_2B mem cpu.reg.pc in
inc_pc cpu 2;
word
2015-03-23 22:38:11 +01:00
(**
http://imrannazar.com/GameBoy-Z80-Opcode-Map
https://github.com/sinamas/gambatte/blob/master/libgambatte/src/cpu.cpp
*)
2015-03-22 16:57:03 +01:00
let run cpu (mem: Memory.map) =
printf "\n";
print_cpu_state cpu;
2015-03-25 16:19:54 +01:00
let opcode = read_pc_byte cpu mem |> char_of_int in
2015-02-28 00:25:10 +01:00
(* Hexa.print_slice cartridge.full_rom cpu.reg.pc (cpu.reg.pc + 7); *)
2015-03-23 17:34:22 +01:00
match opcode with
2015-05-20 16:37:56 +02:00
(* 8-bit load *)
(* LD r,(HL) *)
| '\x7E' -> printf " LD \tA, (HL)\n";
let hl = merge_bytes cpu.reg.l cpu.reg.h in
cpu.reg.a <- Memory.get mem hl;
inc_cycles cpu 8;
2015-02-28 00:25:10 +01:00
| '\x00' -> printf " NOP\n";
2015-03-23 17:34:22 +01:00
inc_cycles cpu 4
2015-02-28 00:25:10 +01:00
| '\x03' -> printf " INC \tBC\n";
inc_BC cpu;
2015-03-23 17:34:22 +01:00
inc_cycles cpu 8
2015-05-08 14:48:44 +02:00
| '\x05' -> printf " DEC \tB\n";
let dec = int_of_char(cpu.reg.b) - 1 in
cpu.flag.z <- dec = 0;
cpu.flag.n <- true;
cpu.flag.h <- dec < 0;
cpu.reg.b <- char_of_int @@ if dec >= 0 then dec else 0;
inc_cycles cpu 4
| '\x06' -> let n = read_pc_byte cpu mem in
printf " LD \tB, 0x%02X\n" n;
cpu.reg.b <- char_of_int n;
inc_cycles cpu 8
2015-03-23 17:34:22 +01:00
2015-03-25 16:19:54 +01:00
| '\x18' -> let n = read_pc_byte cpu mem in
2015-05-08 14:48:44 +02:00
printf " JP \t0x%02X\n" n;
2015-03-25 16:19:54 +01:00
inc_pc cpu (n - 1); inc_cycles cpu 12
2015-03-23 22:38:11 +01:00
2015-03-25 16:19:54 +01:00
| '\x20' -> let n = read_pc_byte cpu mem in
2015-05-08 14:48:44 +02:00
printf " JR \tNZ, 0x%02X\n" n;
2015-03-23 17:34:22 +01:00
if cpu.flag.z = false then
begin
2015-03-25 16:19:54 +01:00
inc_pc cpu (n - 1); inc_cycles cpu 12
2015-03-23 17:34:22 +01:00
end else
begin
2015-03-25 16:19:54 +01:00
inc_cycles cpu 8
2015-03-23 17:34:22 +01:00
end
2015-02-28 00:25:10 +01:00
2015-03-25 16:19:54 +01:00
| '\x21' -> let nn = read_pc_2bytes cpu mem in
2015-05-08 14:48:44 +02:00
printf " LD \tHL, 0x%04X\n" nn;
2015-03-25 16:19:54 +01:00
let high, low = split_2B nn in
cpu.reg.h <- high;
cpu.reg.l <- low;
2015-03-23 22:38:11 +01:00
inc_cycles cpu 12
2015-05-08 14:48:44 +02:00
| '\x22' -> printf " LDI \t(HL), A\n";
let hl = merge_bytes cpu.reg.l cpu.reg.h in
Memory.set mem hl cpu.reg.a;
let high, low = split_2B (hl + 1) in
cpu.reg.h <- high;
cpu.reg.l <- low;
inc_cycles cpu 8
2015-03-23 22:38:11 +01:00
2015-03-25 16:19:54 +01:00
| '\x28' -> let n = read_pc_byte cpu mem in
2015-05-08 14:48:44 +02:00
printf " JR \tZ, 0x%02X\n" n;
2015-03-23 22:38:11 +01:00
if cpu.flag.z = true then
begin
2015-03-25 16:19:54 +01:00
inc_pc cpu (n - 1); inc_cycles cpu 12
2015-03-23 22:38:11 +01:00
end else
begin
2015-03-25 16:19:54 +01:00
inc_cycles cpu 8
2015-03-23 22:38:11 +01:00
end
2015-05-20 16:37:56 +02:00
| '\x34' -> printf " INC \t(HL)\n";
let hl = merge_bytes cpu.reg.l cpu.reg.h in
let v = Memory.get mem hl |> int_of_char in
cpu.flag.z <- v + 1 = 0;
cpu.flag.n <- false;
cpu.flag.h <- v = 0b00001111;
Memory.set mem hl (char_of_int (v + 1));
inc_cycles cpu 12
2015-03-23 22:38:11 +01:00
2015-03-25 16:19:54 +01:00
| '\x3E' -> let n = read_pc_byte cpu mem in
printf " LD \tA, 0x%02X\n" n;
cpu.reg.a <- char_of_int n;
inc_cycles cpu 8
2015-02-28 00:25:10 +01:00
| '\xAF' -> printf " XOR \tA, A\n";
let int_A = int_of_char cpu.reg.a in
cpu.reg.a <- char_of_int @@ int_A lxor int_A;
2015-03-23 17:34:22 +01:00
inc_cycles cpu 4
2015-02-28 00:25:10 +01:00
2015-03-23 22:38:11 +01:00
| '\xC0' -> printf " RET \tNZ\n";
if cpu.flag.z = false then
begin
cpu.reg.pc <- cpu.reg.sp;
inc_cycles cpu 20
end else
inc_cycles cpu 8
2015-03-25 16:19:54 +01:00
| '\xC3' -> let addr = read_pc_2bytes cpu mem in
2015-02-28 00:25:10 +01:00
printf " JP \t0x%04X\n" addr;
cpu.reg.pc <- addr; inc_cycles cpu 16
2015-03-25 16:19:54 +01:00
| '\xE0' -> let n = read_pc_byte cpu mem in
printf " LDH \t(0xFF%02X), A\n" n;
2015-03-23 12:50:02 +01:00
Memory.set mem (0xFF00 + n) cpu.reg.a;
2015-03-25 16:19:54 +01:00
inc_cycles cpu 12
2015-03-05 23:00:28 +01:00
2015-05-20 16:37:56 +02:00
| '\xEA' -> let addr = read_pc_2bytes cpu mem in
printf " LD \t(0X%04X), A\n" addr;
Memory.set mem addr cpu.reg.a;
inc_cycles cpu 16
2015-03-25 16:19:54 +01:00
| '\xF0' -> let n = read_pc_byte cpu mem in
printf " LDH \tA, (0xFF%02X)\n" n;
2015-03-23 12:50:02 +01:00
cpu.reg.a <- Memory.get mem (0xFF00 + n);
2015-03-25 16:19:54 +01:00
inc_cycles cpu 12
2015-02-28 00:25:10 +01:00
| '\xF3' -> printf " DI\n";
(* fixme *)
2015-03-23 17:34:22 +01:00
inc_cycles cpu 4
2015-02-28 00:25:10 +01:00
2015-03-25 16:19:54 +01:00
| '\xFE' -> let n = read_pc_byte cpu mem in
2015-05-08 14:48:44 +02:00
printf " CP \t0x%02X\n" n;
2015-03-23 12:50:02 +01:00
cmp_A cpu n;
2015-03-25 16:19:54 +01:00
inc_cycles cpu 8
2015-03-23 12:50:02 +01:00
2015-05-20 16:37:56 +02:00
| '\xFB' -> printf " EI\n";
(* enable interrupts, IME=1 *)
inc_cycles cpu 4
2015-03-23 22:38:11 +01:00
| x -> eprintf "opcode 0x%02X\n" (int_of_char x);
2015-05-20 16:37:56 +02:00
eprintf "#cycles: %d\n" cpu.cycles;
2015-03-23 22:38:11 +01:00
failwith "Unimplemented opcode."