Add CPU instructions.
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parent
763c81a1e2
commit
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29
src/cpu.ml
29
src/cpu.ml
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@ -112,6 +112,15 @@ let run cpu (mem: Memory.map) =
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let opcode = read_pc_byte cpu mem |> char_of_int in
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(* Hexa.print_slice cartridge.full_rom cpu.reg.pc (cpu.reg.pc + 7); *)
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match opcode with
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(* 8-bit load *)
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(* LD r,(HL) *)
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| '\x7E' -> printf " LD \tA, (HL)\n";
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let hl = merge_bytes cpu.reg.l cpu.reg.h in
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cpu.reg.a <- Memory.get mem hl;
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inc_cycles cpu 8;
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| '\x00' -> printf " NOP\n";
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inc_cycles cpu 4
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@ -172,6 +181,15 @@ let run cpu (mem: Memory.map) =
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inc_cycles cpu 8
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end
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| '\x34' -> printf " INC \t(HL)\n";
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let hl = merge_bytes cpu.reg.l cpu.reg.h in
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let v = Memory.get mem hl |> int_of_char in
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cpu.flag.z <- v + 1 = 0;
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cpu.flag.n <- false;
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cpu.flag.h <- v = 0b00001111;
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Memory.set mem hl (char_of_int (v + 1));
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inc_cycles cpu 12
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| '\x3E' -> let n = read_pc_byte cpu mem in
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printf " LD \tA, 0x%02X\n" n;
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@ -200,6 +218,12 @@ let run cpu (mem: Memory.map) =
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Memory.set mem (0xFF00 + n) cpu.reg.a;
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inc_cycles cpu 12
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| '\xEA' -> let addr = read_pc_2bytes cpu mem in
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printf " LD \t(0X%04X), A\n" addr;
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Memory.set mem addr cpu.reg.a;
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inc_cycles cpu 16
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| '\xF0' -> let n = read_pc_byte cpu mem in
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printf " LDH \tA, (0xFF%02X)\n" n;
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cpu.reg.a <- Memory.get mem (0xFF00 + n);
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@ -214,5 +238,10 @@ let run cpu (mem: Memory.map) =
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cmp_A cpu n;
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inc_cycles cpu 8
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| '\xFB' -> printf " EI\n";
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(* enable interrupts, IME=1 *)
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inc_cycles cpu 4
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| x -> eprintf "opcode 0x%02X\n" (int_of_char x);
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eprintf "#cycles: %d\n" cpu.cycles;
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failwith "Unimplemented opcode."
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